In recent years, with Soc (System on Chip) for wireless communication wherein an RF (Radio Frequency) circuit and digital circuit are included in a single CMOS (Complementary Metal Oxide Semiconductor) chip, there has been developed a technology for finer RF circuits and lower electric power consumption, by employing analog discrete-time signal processing technology such as current mode sampling with high-speed clocks, switched capacitor circuits, and so forth.
An example of a technique to realize finer RF circuits and lower electric power consumption using a discrete-time parametric amplifier (MOSFET parametric amplifier) configured of a MOSFET (Metal Oxide Semiconductor Field effect transistor) is Patent Document 1.
Patent Document 1: US Patent Application Publication No. 2005/275026